
CY28547
.....................Document #: 001-05103 Rev *B Page 22 of 24
The following diagram shows the test load configuration for the
differential CPU and SRC outputs.
Figure 16. Single-ended Load Configuration High Drive Option
Figure 17. 0.8V Differential Load Configuration
2.0V
0.8V
3.3V
0V
T R
T F
1.5V
3.3V sig n al s
T DC
-
Figure 18. Single-ended Output Signals (for AC Parameters Measurement)
Ordering Information
Part Number
Package Type
Product Flow
Lead-free
CY28547LFXC
72-pin QFN
Commercial, 0
to 85C